Presentation
After having studied the basic model of the digital processing architectures and associated design methodology at the module ELP317, we offer the module ELP417 to illustrate the application of this methodology using state of the art Computer Aided Design (CAD) tools. Thus, the elementary processor studied in ELP317 will be implemented (using VHDL), validated by simulation, and prototyped on a development FPGA-based board using appropriate CAD tools.
Prerequisites
Module ELP317
Objectives
- to be able to develop digital processing system architectures from the basic elements of combinational and sequential logic
- to be able to apply the methodology of architecture design of digital systems processing using Computer Aided Design (CAD) tools
- to be able to manipulate CAD tools for digital circuits
Duration:
6h
Content
BE1: Design of an elementary processor - part 1
- Design of the control unit (VHDL) and validation by simulation
BE2: Design of an elementary processor - part 2
- Integration with the given datapath unit and adding the program memory block
- Validation by simulation through test programs
- Prototyping on an FPGA-based development board
Organization
Examination
Final exam.
Scheduled activities
- BE1 (3h) Conception d'un processeur élémentaire - 1ère partie
- BE2 (3h) Conception d'un processeur élémentaire - 2nde partie
Team
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